Marco Caccamo
High-Performance Real-Time Computing for Cyber-Physical Systems
Multiprocessor Systems-on-Chip (MPSoC) have been originally designed for high performance computing applications, but their rich feature set can be exploited to efficiently implement mixed criticality domains serving both hard real-time tasks, as well as soft real-time tasks. This talk explores SW-based real-time memory management techniques based on pipelining, scheduling, and an execution model to show how commercially available MPSoCs can support hard real-time and mixed criticality systems, where cores are strictly isolated to avoid contention on shared resources like Last-Level Cache (LLC) and main memory. Some working implementations on modern MPSoC platforms are presented, together with results based on sets of benchmark applications.
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